A static random access memory (SRAM) is one type of a semiconductor memory device. An SRAM includes memory cells that store data. The memory cells are arranged in matrix form. The SRAM includes a plurality of word lines extending in a row direction of the memory cells and a plurality of bit line pairs extending in a column direction of the memory cells. Each memory cell is coupled to a corresponding word line and a corresponding bit line pair.
The SRAM activates one of the word lines in response to an address signal. The activation of the word line turns ON an accessed transistor. The SRAM also selects one of the bit line pairs in response to the address signal. The memory cell, which is coupled to the turned ON accessed transistor and the selected bit line pair, becomes the subject of access. The SRAM performs a write operation and a read operation on the accessed memory cell.
As described above, the memory cells arrayed in the row direction are coupled to one corresponding word line. Therefore, when one word line is activated, memory nodes of the memory cells coupled to that word line are coupled to the corresponding bit line pairs. Among the memory cells coupled to the activated word line, the potential at the memory node of the memory cell coupled to a non-selected bit line pair may be inverted by the potential at the corresponding bit line pair. That is, the stored data in the memory cell coupled to the non-selected bit line pair may become corrupted.
To obviate the corruption of data, WO 2009/041471 describes the coupling of a sense amplifier to each bit line pair. In this method, for example, during a write operation, the sense amplifier sets the potential at each bit line pair to a power supply voltage at the high potential side and a power supply voltage at the low potential side. Then, a write amplifier changes the potential at the selected bit line pair in accordance with the input data. In this manner, the sense amplifier is used so that the potential at each bit line pair corresponds to the level held by the memory cell. This prevents data inversion of the memory cell.
In the method described above, however, a sense amplifier is coupled to each bit line pair, and the sense amplifiers are all driven whenever a read operation or a write operation is performed. This increases the power consumption of the semiconductor memory device.